AttoTudeEDA and CAD Lead Engineer / Manager
Menlo Park, CA, Bethlehem, PA
$140K–$200K
Why join AttoTude?
Hyperscale operators building AI clusters could end up leaning on whatever links their GPUs, and AttoTude wants that link to skip optics. Copper cannot reach far enough for AI scale-up, so the Menlo Park maker's dielectric approach could rewire the next generation of data centers. Mayfield and Keysight back a Series C after $142M raised across four rounds, and 10 of its 15 open roles are in engineering.
JustBacked's take, based on AttoTude's own site and its funding and hiring data.
We are seeking an experienced EDA/CAD lead engineer to join our growing team. In this role, you will be part of the experience design and layout team to develop cutting-edge mixed-signal ICs. You will be involved in the technical aspects of the ASIC design and development, from concept through to production. This is a hands-on technical position that requires in-depth technical expertise, and the ability to work in a team of highly experienced engineers to accomplish the goals.
Key Responsibilities:
- Floor planning, IP integration
- Pad Ring creation
- Work with analog/mixed-signal designers for high-performance layout integration
- Work with digital designers for DFT/ATPG/Scan logic integration
- Perform LVS/DRC checks and fix issues
- Integration of Digital/RF/mmWave blocks into IC Top Level
- Collaborate with cross-functional teams to ensure timely project execution and design tape-outs
- Stay updated with the latest trends and technologies in wideband high speed IC design and apply them to improve project outcomes
- Occasional travel to the Bay Area (<20%) for remote position
Qualifications:
- 5+ years of hands-on experience in CMOS (bulk and advanced FinFET) IC implementation in multiple process technologies
- Strong experience with Cadence (and various EDA) tools is required (Virtuoso, Calibre, Voltus)
- Experience in multiple dedicated tapeout support is required
- Scripting language experience in Tcl, Python, Perl, Makefile, and shell scripts are required
Education:
- Formal Cadence digital layout training or certification is required
- Bachelor’s degree in electrical engineering, computer science or a related field is preferred
Preferred Skills:
- Experience with CMOS, and/or SiGe Process Development Kits
- Experience working on a multidisciplinary team with RF/Mixed Signal, Hardware, Firmware, and Software engineers
- Strong communication and teamwork skills
- Experience working in fast-paced environments with a strong track record of delivering high-quality designs on time.
Benefits:
- Competitive salary
- Stock options plan
- Paid time off
- Health benefits